• JEDEC standard 1.5V ± 0.075V Power supply

• VDDQ = 1.5V ± 0.075V

• 667MHz fCK for 1333MB/sec/pin

• 8 independent internal bank

• Programmable CAS Latency: 5,6,7,8,9,10

• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock

• Programmable CAS Write Latency (CWL) = 9 (DDR3-1333)

• Burst Lenght: 8 (Interleave without any limit, sequential with starting address "000" only), 4 with tCCD = 4 which does not allow seamless read or write (either on the fly using A12 or MRS)

• Posted CAS

• Bi-directional Differential Data Strobe

• Internal (self) calibration: Internal self calibration through ZQ pin (RZQ: 240 ohm ± 1%)

• On Die Termination using ODT pin

• Average Refresh Period 7.8us at lower than TCASE 85°c < TCASE . 95°C

• Asynchronous Reset

• 1066Mbps CL7 doesn't have backward compatibility with 800Mbps CL5

• PCB: Height 1.180" (30.00mm), single sided component

• 8-bit pre-fetch

• Programmable CAS Write Latency (CWL) = 9 (DDR3-1333)

• CL (IDD): 9 cycles

• Row Cycle Time (tRCmin): 49.5ns (min.)

• Refresh to Active/Refresh Command Time (tRFCmin): 110ns

• Row Active Time (tRASmin): 36ns (min.)

• Power: 1.296 W (operating)

• UL Rating: 94 V - 0

• Operating Temperature: 0° C to 85° C

• Storage Temperature: -55° C to +100° C